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?2004 fairchild semiconductor corporation www.fairchildsemi.com rev.1.0.0 features ? single chip 700v sense fet power switch ? precision fixed operating frequency (134khz) ? advanced burst-mode operation consumes under 0.1w at 265vac and no load (fsd210b only) ? internal start-up switch and soft start ? under voltage lock out (uvlo) with hysteresis ? pulse by pulse current limit ? over load protection (olp) ? internal thermal shutdown function (tsd) ? auto-restart mode ? frequency modulation for emi ? FSD200B does not require an auxiliary bias winding applications ? charger & adaptor for mobile phone, pda & mp3 ? auxiliary power for white goods, pc, c-tv & monitor description the FSD200B and fsd210b are integrated pulse width modulators (pwm) and sense fets specially designed for high performance off-line switch mode power supplies (smps) with minimal external components. both devices are monolithic high voltage power switching regulators which combine an ldmos sense fet with a voltage mode pwm control block. the integrated pwm controller features in- clude: a fixed oscillator with frequency modulation for re- duced emi, under voltage lock out (uvlo) protection, leading edge blanking (leb), optimized gate turn-on/turn- off driver, thermal shut down protection (tsd), temperature compensated precision current sources for loop compensa- tion and fault protection circuitry. when compared to a dis- crete mosfet and controller or rcc switching converter solution, the FSD200B and fsd210b reduce total compo- nent count, design size, weight and at the same time increase efficiency, productivity, and system reliability. the FSD200B eliminates the need for an auxiliary bias winding at a small cost of increased supply power. both devices are a basic plat- form well suited for cost effective designs of flyback convert- ers. table 1. notes: 1. typical continuous power in a non-ven- tilated enclosed adapter measured at 50 c ambient. 2. maximum practical continuous power in an open frame design at 50 c ambient. 3. 230 vac or 100/115 vac with doubler. typical circuit figure 1. typical flyback application using fsd210b figure 2. typical flyback application using FSD200B output power table product 230vac 15% (3) 85-265vac adapter (1) open frame (2) adapter (1) open frame (2) fsd210b5w7w4w5w FSD200B5w7w4w5w fsd210bm 5w 7w 4w 5w FSD200Bm 5w 7w 4w 5w drain source vstr vfb vcc pwm ac in dc out drain source vstr vfb vcc pwm ac in dc out fsd210b, FSD200B green mode fairchild power switch (fps tm )
fsd210b, FSD200B 2 internal block diagram figure 3. functional block diagram of fsd210b figure 4. functional block diagram of FSD200B showing internal high voltage regulator 8 5 uvlo voltage ref h vstr vcc internal bias l rsense iover s/s 3ms 4 1, 2, 3 7 osc s r q tsd s r q leb olp reset a/r driver frequency modulation 5ua 250ua vck vth sfet drain gnd vfb burst v sd v burst 8.7/6.7v rsense iover s/s 3ms 4 1, 2, 3 7 osc s r q tsd s r q leb olp reset a/r driver frequency modulation 5ua 250ua vck vth sfet drain gnd vfb burst v sd v burst 7v 8 5 uvlo voltage ref. hv/reg internal bias on/off vstr vcc
fsd210b, FSD200B 3 pin definitions pin configuration figure 5. pin configuration (top view) pin number pin name pin function description 1, 2, 3 gnd sense fet source terminal on primary side and internal control ground. 4vfb the feedback voltage pin is the inverting input to the pwm comparator with nominal input levels between 0.5vand 2.5v. it has a 0.25ma current source connected internally while a capacitor and opto coupler are typically connected externally. a feedback voltage of 4.5v triggers overload protection(olp). there is a time delay while charging between 3v and 4.5v using an internal 5ua current source, which prevents false triggering under transient conditions but still allows the protection mechanism to operate under true overload conditions. 5vcc fsd210b positive supply voltage input. although connected to an auxiliary transformer winding, current is supplied from pin 8 (vstr) via an internal switch during startup (see internal block diagram section). it is not until vcc reaches the uvlo upper threshold (8.7v) that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding. FSD200B this pin is connected to a storage capacitor. a high voltage regulator connected between pin 8 (vstr) and this pin, provides the supply voltage to the FSD200B at startup and when switching during normal operation. the FSD200B eliminates the need for auxiliary bias winding and associated external components. 7drain the drain pin is designed to connect directly to the primary lead of the transformer and is capable of switching a maximum of 700v. minimizing the length of the trace connecting this pin to the transformer will decrease leakage inductance. 8vstr the startup pin connects directly to the rectified ac line voltage source for both the FSD200B and fsd210b. for the fsd210b, at start up the internal switch supplies internal bias and charges an external storage capacitor placed between the vcc pin and ground. once this reaches 8.7v, the internal current source is disabled. for the FSD200B, an internal high voltage regulator provides a constant supply voltage. 1 2 3 45 7 8 gnd gnd gnd vfb vstr drain vcc 7-dip 7-lsop
fsd210b, FSD200B 4 absolute maximum ratings (ta=25 c unless otherwise specified) thermal impedance note: 1. free standing without heat sink. 2. measured on the gnd pin close to plastic interface. 3. no copper clad. parameter symbol value unit drain-source breakdown voltage bv dss 700 v startup voltage (vstr) breakdown bv str 700 v maximum supply voltage (FSD200B) v cc,max 10 v maximum supply voltage (fsd210b) v cc,max 20 v input voltage range v fb ? 0.3 to v stop v operating junction temperature. t j internally limited c operating ambient temperature t a ? 25 to +85 c storage temperature range t stg ? 55 to +150 c parameter symbol value unit 7dip junction-to-ambient thermal ja (1) 88.04 (3) c/w junction-to-case thermal jc (2) 24.01 c/w 7lsop junction-to-ambient thermal ja (1) 85.53 (3) c/w junction-to-case thermal jc (2) - c/w
fsd210b, FSD200B 5 electrical characteristics (ta=25 c unless otherwise specified) note: 1. test current slope : di/dt = 150ma/us 2. these parameters, although guaranteed, are not 100% tested in production 3. this parameter is derived from characterization parameter symbol condition min. typ. max. unit sense fet section off-state current i dss v ds = 560v - - 100 a on-state resistance r ds(on) tj = 25 c, i d = 25ma - 28 32 ? tj = 100 c, i d = 25ma - 42 48 ? rise time t r v ds = 325v, i d = 50ma - 100 - ns fall time t f v ds = 325v, l d = 25ma - 50 - ns control section output frequency f osc tj = 25 c 126 134 142 khz output frequency modulation f mod tj = 25 c-4-khz feedback source current i fb vfb = 0v 0.22 0.25 0.28 ma maximum duty cycle d max vfb = 3.5v 60 66 72 % minimum duty cycle d min vfb = 0v 0 0 0 % uvlo threshold voltage (FSD200B) v start 6.377.7 v v stop after turn on 5.3 6 6.7 v uvlo threshold voltage (fsd210b) v start 8.0 8.7 9.4 v v stop after turn on 6.0 6.7 7.4 v supply shunt regulator (FSD200B) v ccreg --7-v internal soft start time t s/s -3-ms burst mode section burst mode voltage v burh tj = 25 c 0.58 0.64 0.7 v v burl 0.5 0.58 0.64 v hysteresis - 60 - mv protection section drain to source peak current limit (1) i over 0.275 0.320 0.365 a current limit delay (2) t cld tj = 25 c - 220 - ns thermal shutdown temperature (tj) (2) t sd 125 145 160 c shutdown feedback voltage v sd - 4.0 4.5 5.0 v feedback shutdown delay current i delay vfb = 4.0v 3 5 7 a leading edge blanking time (3) t leb 200 - - ns total device section operating supply current (FSD200B) i op vcc = 7v - 600 - a operating supply current (fsd210b) i op vcc = 11v - 700 - a start up current (FSD200B) i start vcc = 0v - 1 1.2 ma start up current (fsd210b) i start vcc = 0v - 700 900 a vstr supply voltage vcc = 0v 20 - - v
fsd210b, FSD200B 6 comparison between fsdh565 and fsd210b function fsdh0565 fsd210b fsd210b advantages soft-start not applicable 3ms ? gradually increasing current limit during soft-start further reduces peak current and voltage component stresses ? eliminates external components used for soft-start in most applications ? reduces or eliminates output overshoot switching frequency 100khz 134khz ? smaller transformer frequency modulation not applicable 4khz ? reduced conducted emi burst mode operation not applicable yes-built into controller ? improve light load efficiency ? reduces no-load consumption ? transformer audible noise reduction drain creepage at package 1.02mm 3.56mm dip 3.56mm lsop ? greater immunity to acting as a result of build-up of dust, debris and other contaminants
fsd210b, FSD200B 7 typical performance characteristics (these characteristic graphs are normalized at ta=2 5 ) frequency vs. temp operating current vs. temp peak current limit vs. temp feedback source current vs. temp vstop voltage vs. temp 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) feedback source current (a) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) peak current limit (a) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) operating current (a) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) fosc (khz) 0.00 0.20 0.40 0.60 0.80 1.00 1.20 -25 0 25 50 75 100 125 junction temperature ( ) vstart (v) 0.00 0.20 0.40 0.60 0.80 1.00 1.20 -25 0 25 50 75 100 125 junction temperature ( ) vstop (v) vstart voltage vs. temp
fsd210b, FSD200B 8 typical performance characteristics (continued) (these characteristic graphs are normalized at ta=2 5 ) on state resistance vs. temp breakdown voltage vs. temp 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) vcc regulation voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -25 0 25 50 75 100 125 junction temperature ( ) on state resistance ( ) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) bvdss (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) vsd (v) vcc regulation voltage vs. temp (for FSD200B) shutdown feedback voltage vs. temp start up current vs. temp (for fsd210b) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -25 0 25 50 75 100 125 junction temperature ( ) istart (a) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -25 0 25 50 75 100 125 junction temperature ( ) istart (a) start up current vs. temp (for FSD200B)
fsd210b, FSD200B 9 functional description 1. startup : at startup, the internal high voltage current source supplies the internal bias and charges the external vcc capacitor as shown in figure 7. in the case of the fsd210b, when vcc reaches 8.7v the device starts switch- ing and the internal high voltage current source is disabled (see figure 1). the device continues to switch provided that vcc does not drop below 6.7v. for fsd210b, after startup, the bias is supplied from the auxiliary transformer winding. in the case of FSD200B, vcc is continuously supplied from the external high voltage source and vcc is regulated to 7v by an internal high voltage regulator (hvreg), thus elimi- nating the need for an auxiliary winding (see figure 2). figure 6. internal startup circuit calculating the vcc capacitor is an important step to design- ing in the FSD200B/210b. at initial start-up in both the FSD200B/210b, the stand-by maximum current is 100ua, supplying current to uvlo and vref block. the charging current (i) of the vcc capacitor is equal to istr - 100ua. after vcc reaches the uvlo start voltage only the bias winding supplies vcc current to device. when the bias winding volt- age is not sufficient, the vcc level decreases to the uvlo stop voltage. at this time vcc oscillates. in order to prevent this ripple it is recommended that the vcc capacitor be sized between 10uf and 47uf. 2. feedback control : the FSD200B/210b are both voltage mode devices as shown in figure 8. usually, a h11a817 optocoupler and ka431 voltage reference (or a fod2741 integrated optocoupler and voltage reference) are used to implement the isolated secondary feedback network. the feedback voltage is compared with an internally generated sawtooth waveform, directly controlling the duty cycle. when the ka431 reference pin voltage exceeds the internal reference voltage of 2.5v, the optocoupler led current increases pulling down the feedback voltage and reducing the duty cycle. this event will occur when either the input voltage increases or the output load decreases. figure 7. charging the vcc capacitor through vstr 3. leading edge blanking (leb) : at the instant the inter- nal sense fet is turned on, there usually exists a high cur- rent spike through the sense fet, caused by the primary side capacitance and secondary side rectifier diode reverse recov- ery. exceeding the pulse-by-pulse current limit could cause premature termination of the switching pulse (see protection section). to counter this effect, the fps employs a leading edge blanking (leb) circuit. this circuit inhibits the over current comparator for a short time (tleb) after the sense fet is turned on. figure 8. pwm and feedback circuit 4. protection circuit : the FSD200B/210b has 2 self pro- tection functions: over load protection (olp) and thermal shutdown (tsd). because these protection circuits are fully integrated into the ic with no external components, system vin,dc vstr vcc hv reg. vin,dc vstr vcc 7v istr istr fsd210b FSD200B 8.7v/ 6.7v l h vin , dc vin , dc vin , dc vin , dc vstr vstr vstr vstr istr istr istr istr j-f e t j-f e t j-f e t j-f e t u vlo vre f ma x ma x ma x ma x 1 00ua 1 00ua 1 00ua 1 00ua i = istr-ma x i = istr-ma x i = istr-ma x i = istr-ma x 1 00ua 1 00ua 1 00ua 1 00ua i = istr-ma x 1 00ua i = istr-ma x 1 00ua i = istr-ma x 1 00ua i = istr-ma x 1 00ua fsd2 xx fsd2 xx fsd2 xx fsd2 xx vcc vcc vcc vcc uvlo start uvlo stop t vcc vcc must not drop to uvlo stop auxiliary winding voltage 4 osc vcc vref 5ua 0.25ma v sd r fb gate driver olp vfb ka431 cfb vo
fsd210b, FSD200B 10 reliability is improved without a cost increase. if either of these thresholds are triggered, the fps starts an auto-restart cycle. once the fault condition occurs, switching is termi- nated and the sense fet remains off. this causes vcc to fall. when vcc reaches the uvlo stop voltage (6.7v:fsd210b, 6v:FSD200B), the protection is reset and the internal high voltage current source charges the vcc capacitor. when vcc reaches the uvlo start voltage (8.7v:fsd210b,7v:FSD200B), the device attempts to resume normal operation. if the fault condition is no longer present start up will be successful. if it is still present the cycle is repeated (see figure 10). figure 9. protection block 4.1 over load protection (olp) : over load protection occurs when the load current exceeds a pre-set level due to an abnormal situation. if this occurs, the protection circuit should be triggered to protect the smps. it is possible that a short term load transient can occur under normal operation. in order to avoid false shutdowns, the over load protection circuit is designed to trigger after a delay. therefore the device can differentiate between transient over loads and true fault conditions. the maximum input power is limited using the pulse-by-pulse current limit feature. if the load tries to draw more than this, the output voltage will drop below its set value. this reduces the optocoupler led cur- rent which in turn reduces the photo-transistor current (see figure 9). therefore, the 250ua current source will charge the feedback pin capacitor, cfb, and the feedback voltage, vfb, will increase. the input voltage of the feedback com- parator(vfb) is only charged from delay current source after the feedback current can not charge the feedback capacitor any more. once the feedback is not charged from feedback current any more, the device switches at maximum drain current, the 250ua current source is blocked and the 5ua source continues to charge cfb. and once vfb reaches olp(4.5v), switching stops.and overload protection is trig- gered. the resultant shutdown delay time, t2, is dependent on feedback capacitor and feedback delay current, in fig. 8 4.2 thermal shutdown (tsd) : the sense fet and the control ic are integrated, making it easier for the control ic to detect the temperature of the sense fet. when the tem- perature exceeds approximately 145c, thermal shutdown is activated. figure 10. over load protection delay 5. soft start : FSD200B/210b has an internal soft start cir- cuit that gradually increases current through the sense fet as shown in figure 11. the soft start time is 3msec in FSD200B/210b. figure 11. internal soft start 6. burst operation : in order to minimize the power dissipa- tion in standby mode, the FSD200B/210b implements burst mode functionality (see figure 12). as the load decreases, the feedback voltage decreases. as shown in figure 13, the device automatically enters burst mode when the feedback voltage drops below v burl (0.58v). at this point switching stops and the output voltages start to drop at a rate dependant on standby current load. this causes the feedback voltage to rise. once it passes v burh (0.64v) switching starts again. the feedback voltage falls and the process repeats. burst osc 4 vfb s r q gate driver fsd2xxb olp, tsd protection block 5ua 250ua reset vth 4.5v olp + - tsd s r q a/r cfb r vfb t olp 4.5v t1 t3 t1<FSD200B/210b i(a) t
fsd210b, FSD200B 11 mode operation alternately enables and disables switching of the power sense fet thereby reducing switching loss in standby mode. figure 12. circuit for burst operation figure 13. burst mode operation 7. frequency modulation : emi reduction can be accom- plished by modulating the switching frequency of a smps. frequency modulation can reduce emi by spreading the energy over a wider frequency range. the amount of emi reduction is directly related to the level of modulation (fmod) and the rate of modulation. as can be seen in figure 14, the frequency changes from 130khz to 138khz in 4ms for the FSD200B/fsd210b. frequency modulation allows the use of a cost effective inductor instead of an ac input mode choke to satisfy the requirements of world wide emi limits. figure 14. frequency modulation waveforms figure 15. fsdh0165 full range emi scan(100khz, no frequency modulation) with charger set figure 16. fsd210b full range emi scan(134khz, with frequency modulation) with charger set osc 4 vfb s r q gate driver 5ua 250ua 0.64v /0.58v on/off fsd2xx burst operation block v fb vds 0.58v 0.64v ids vo vo set time 138khz 138khz 134khz 130khz 8khz turn-on turn-off point internal oscillator drain to source voltage vds waveform drain to source current frequency(mhz) amplitude(db v) cispr22q(pk) cispr22a(av) amplitude(db v) frequency(mhz) cispr22q(pk) cispr22a(av)
fsd210b, FSD200B 12 typical application circuit features ? high efficiency (>67% at universal input) ? low zero load power consumption (<100mw at 240vac) with fsd210b ? low component count ? enhanced system reliability through various protection functions ? internal soft-start (3ms) ? frequency modulation for low emi key design notes ? the constant voltage (cv) mode control is implemented with resistors, r8, r9, r10 and r11, shunt regulator, u2, feedback capacitor, c9 and opto-coupler, u3. ? the constant current (cc) mode control is designed with resistors, r8, r9, r15, r16, r17 and r19, npn transistor, q1 and ntc, th1. when the voltage across current sensing resistors, r15,r16 and r17 is 0.7v, the npn transistor turns on and the current through the opto coupler led increases. this reduces the feedback voltage and duty ratio. therefore, the output voltage decreases and the output current is regulated. ? the ntc(negative thermal coefficient) is used to compensate the temperature characteristics of the transistor q1. 1. schematic application output power input voltage output voltage (max current) cellular phone charger 3.38w universal input (85-265vac) 5.2v (650ma) for fsd2 1 x for fsd2 1 x for fsd2 1 x for fsd2 1 x l3 4uh c8 330uf 16v l1 330uh r19 510r r8 510r d6 1n4148 r3 47k th1 10k vo . r15 3r0 r5 39r q1 ksp2222a 1 u2 tl431 d1 1n4007 r16 3r0 c9 470nf tx1 r10 2.2k c2 4.7uf 400v 0 3 c4 100nf h11a817b u3 r1 4.7k 4 c1 4.7uf 400v c5 33uf 50v 7 fuse 1w, 10r c6 152m-y, 250vac d3 1n4007 8 h11a817b 2 1 r7 4.7m, 1/4w ac r17 3r0 d2 1n4007 d4 1n4007 r9 56r d5 uf4007 ac 0 r12 2k c7 330uf 16v (5.2v/0.65a) r4 47k c10 4.7uf 50v u1 fsd210 8 5 7 1 4 2 3 vstr vcc drain gnd vfb gnd gnd d7 sb260 r6 4.7m 1/4w 0 c3 102k 1kv
fsd210b, FSD200B 13 2. demo circuit part list 3. transformer schematic diagram 4. winding specification 5. electrical characteristics to-92 type, lm431 vref=2.495v(typ.) 1 ka431az u2 iover=0.3a, fairchildsemi 0.5a/700v 1 fsd210 (fsd200) u1 - ctr 80~160% 1 h11a817a u3 do41 type 1a/1000v ultra fast diode 1 uf4007 d5 d0-213 type 10ma/100v junction diode 1 1n4148 d6 d0-41 type 2a/60v schottky diode 1 sb260 d7 1 4 quantity ic=600ma, vce=30v 1a/1000v junction rectifier description to-92 type ksp2222a q1 do41 type 1n4007 d1,d2,d3,d4 requirement/comment part # reference to-92 type, lm431 vref=2.495v(typ.) 1 ka431az u2 iover=0.3a, fairchildsemi 0.5a/700v 1 fsd210 (fsd200) u1 - ctr 80~160% 1 h11a817a u3 do41 type 1a/1000v ultra fast diode 1 uf4007 d5 d0-213 type 10ma/100v junction diode 1 1n4148 d6 d0-41 type 2a/60v schottky diode 1 sb260 d7 1 4 quantity ic=600ma, vce=30v 1a/1000v junction rectifier description to-92 type ksp2222a q1 do41 type 1n4007 d1,d2,d3,d4 requirement/comment part # reference core : ee1616 bobbin : ee1616(h) w4 w3 w2 w1 2mm 2mm w4 w3 w2 w1 2mm 2mm 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 8 8 8 8 7 7 7 7 6 6 6 6 5 5 5 5 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 8 8 8 8 7 7 7 7 6 6 6 6 5 5 5 5 . insulation : polyester tape t=0.025mm / 10mm, 3ts solenoid winding 9 ts 0.40 ? 1 8 7 w4 insulation : polyester tape t=0.025mm / 10mm, 3ts solenoid winding 50 ts 0.16 ? 1 1 open w3 insulation : polyester tape t=0.025mm / 10mm, 2ts center solenoid winding 18 ts 0.16 ? 1 4 3 w2 insulation : polyester tape t=0.025mm / 10mm, 2ts solenoid winding 99 ts 0.16 ? 1 1 2 w1 winding method winding method turns turns wire wire pin (s pin (s f) f) no. no. insulation : polyester tape t=0.025mm / 10mm, 3ts solenoid winding 9 ts 0.40 ? 1 8 7 w4 insulation : polyester tape t=0.025mm / 10mm, 3ts solenoid winding 50 ts 0.16 ? 1 1 open w3 insulation : polyester tape t=0.025mm / 10mm, 2ts center solenoid winding 18 ts 0.16 ? 1 4 3 w2 insulation : polyester tape t=0.025mm / 10mm, 2ts solenoid winding 99 ts 0.16 ? 1 1 2 w1 winding method winding method turns turns wire wire pin (s pin (s f) f) no. no. 3,4,7,8 short 100khz, 1v 50uh 1 ? 2 leakage l 1khz, 1v 1.6mh 1 ? 2 inductance rem arks rem arks specification specification terminal terminal it em it em 3,4,7,8 short 100khz, 1v 50uh 1 ? 2 leakage l 1khz, 1v 1.6mh 1 ? 2 inductance rem arks rem arks specification specification terminal terminal it em it em 3,4,7,8 short 100khz, 1v 50uh 1 ? 2 leakage l 1khz, 1v 1.6mh 1 ? 2 inductance rem arks rem arks specification specification terminal terminal it em it em 3,4,7,8 short 100khz, 1v 50uh 1 ? 2 leakage l 1khz, 1v 1.6mh 1 ? 2 inductance rem arks rem arks specification specification terminal terminal it em it em
fsd210b, FSD200B 14 typical application circuit features ? non isolation buck converter ? low component count ? enhanced system reliability through various protection functions key design notes ? the output voltage(12v) is regulated with resistors, r1, r2 and r3, zener diode, d3, the transistor, q1 and the capacitor, c2. while the fsd210b is off diodes, d1 and d2, are on. at this time the output voltage, 12v, can be sensed by the feedback components above. this output is also used with bias voltage for the fsd210b. ? r, 680k, is to prevent the olp(over load protection) at startup. ? r, 8.2k, is a dummy resistor to regulate output voltage in light load. 1. schematic 2. demo circuit part list application output power input voltage output voltage (max current) non isolation buck 1.2w universal dc input (100 ~ 375vac) 12v (100ma) r 680k r2 110 0 c1 4.7uf/400v r 8.2k r3 750 d3(zd) 1n759a gnd q1 ksp2222a c4 1000uf 16v c2 47nf/50v gnd r1 110 u1 fsd21x 8 5 7 1 4 2 3 vstr vcc drain gnd vfb gnd gnd c5 47uf 50v d1 uf4004 vindc d2 uf4004 vout(12v/100ma) l1 1mh to-92 type 1 q1 do-35 type 12vz d/0.5w 1 1n759a zd1 0. 5a/700v 1 fsd210 u1 2 quantity 1a/1000v ultra fast diode des cripti on do41 type uf4007 d1,d2, requirement/comment part # reference ic=200ma, vcc=40v 1 ksp2222a 1 iover=0.3a 1 quantity 1 des cripti on do41 type d1,d2 requirement/comment part # reference
fsd210b, FSD200B 15 layout considerations (for flyback convertor) figure 17. layout considerations for fsd2x0b using 7dip #1 : gnd #2 : gnd #3 : gnd #4 : vfb #5 : vcc #6 : n.c. #7 : drain #8 : vstr copper area for heatsin k
fsd210b, FSD200B 16 package dimensions 7-dip
fsd210b, FSD200B 17 package dimensions (continued) 7-lsop
fsd210b, FSD200B 12/16/04 0.0m 001 ? 2004 fairchild semiconductor corporation life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. ordering information product number package rating marking code topr ( c) fsd210b 7dip 700v, 0.5a fsd210 ? 25 c to +85 c FSD200B 7dip 700v, 0.5a fsd200 ? 25 c to +85 c fsd210bm 7lsop 700v, 0.5a fsd210 ? 25 c to +85 c FSD200Bm 7lsop 700v, 0.5a fsd200 ? 25 c to +85 c

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